Most electronic packages, which include sensors connected to input/output devices thereof, utilize leadframes, a PCB, or combinations thereof. Such electronic packages generally require that conductors and/or insulators connect from a sensing element to the outside of the package for a customer to properly interface with the device. Leadframes provide customized configurations in which a designer can create many packages in order to meet a customer's overall need. Unfortunately, all of this customization must link in some electrical means to create a device. Common methods of connecting to leadframes including wire bonding and soldering techniques. Both of these connecting methods require that the leadframe be plated. Common plating material for wire bonding involves the use of gold, while tin is often utilized for soldering.
A number of complications are involved in the use of leadframes. For example, leadframes require cleaning following stamping and prior to plating in order to remove excessive oils and contaminates. Leadframes also function as a conductor and require an insulator to allow a usable electronic connection. Leadframes additionally require a significant capital investment to produce the conductor. The ability of a leadframe to be manipulated into a desired package configuration is very limited because the method of production chosen typically involves stamping. The simplest leadframe would be flat and straight. Any deviation from the simple design requires significant effort to ensure that angles and bends are precise for not only the package configuration, but also interface with the overmold process. It can thus be appreciated that the use of leadframes presents a number of assembly and manufacturing issues.
An alternative to leadframes is the PCB (Printed Circuit Board), which has become an economical means for producing circuitry utilizing copper foil, fiberglass, and resin to create the insulated conductor. This method maximizes the efficiency of the conductor when compared to the leadframe, because the conductor material requirement comes closer to meeting the electrical requirements required by the circuit. Yet, PCB issues include the cost of the board when the size becomes large. In addition, the conductor is merely flat.
Also, a requirement exists to provide an interconnect to the PCB in order to interface with the customer's I/O. Due to the standardization of PCBs, the designer must attempt to optimize the area within the panel. Additionally, routing may be required, not only to give the PCB dimensional size, but also to disconnect from the panel. Thus, the use of PCB components can result in a number of problems in component assembly and manufacturing, which may not in fact be superior to the use of leadframes.
In creating small electronic components, such as sensor devices, for example, packing designs utilize metal conductors and/or leadframes to connect such devices to an input component, which is typically not cost-effective with respect to the overall assembly and manufacturing process. The solution to such cost issues touches many elements of the resulting component structure, such as material, labor and capital. A need thus exists for an assembly process, which overcomes these cost issues, while also providing the full capabilities of devices, such as PCB, leadframe and/or metal conductor components. It is believed that a solution to these problems lies in the combined use of Flip Chip On Board (FCOB), plastic substrate, and ultrasonic bonding techniques.
Sensors formed from integrated circuit technology often are formed from a die structure. The use of die technology has enabled integrated circuits and related components to be mass-produced for many consumer, industrial, commercial, defense and other applications. Some sensor technologies produced in this manner are configured upon a silicon die. One type of silicon die that is finding increasing use in integrated circuit applications is the SiC die. Some sensor devices are particularly suited, for example, to integrated circuit components configured from an SiC die. One example of such a sensor is the NOx sensor. Currently, there does not exist a cost effect means for bonding an SiC die, such as that utilized in, for example, an NOx sensor.
Platinum bonding has been offered as one solution to this problem. Platinum bonding configurations, however, tend to wear out the tools utilized the integrated circuit (IC) formation process and also rely upon fragile wire bonds that must be contended with during the IC packaging steps.
A number of chip designs are currently being implemented for high or extremely high heat applications. Standard techniques, such as solder and polymers are not capable of withstanding temperatures above 300° C. Brazing is another technique that is used in various chip designs. Brazing, however, is not commercially viable. Similarly, wire bonding is not a consistent means of die attachment due to wear, which result from the toughness of the wire utilized, even with enhancements in wire bonding tooling.
The tools utilized for such applications tend to degrade quickly resulting in bonding that is inconsistent in a short amount of time. Besides these electrical connection issues, the physical connection or mounting configuration of the IC chip also presents problems. Current applications utilize polymer, which again can only survive up to a temperature of approximately 300° C., which is not sufficient for high heat environments. In applications where the device is required to function in heats of, for example, 600° C. to 1000° C. and upwards, the number of materials and components that survive the heat and/or corrosive atmospheres is very limited.
It is believed that a cost-effective and efficient solution to this unsolved problem involves the use of “flip-chip” technology. In general flip chip interconnect technology is a method of joining a chip and a carrier together to form a package. The chip has an array of die pads each having a bump thereon. After the chip is flipped over, the bumps on the die pads are made to bond with contacts on the carrier so that the chip is electrically connected to the carrier via the bumps. The carrier also has internal circuits leading to external electronic devices. Since flip chip packaging technique is suitable for packaging high pin count chips and capable of reducing packaging area and shortening signal transmission paths, flip-chip technology has been applied quite widely to the manufacturing of chip packages. At present, chip packages that utilize flip-chip technique include flip-chip ball grid array (FCBGA), flip-chip pin grid array (FCPGA), chip-on-board (COB) and so on.